uart-programming

Here are 2 public repositories matching this topic...

A 6-Stage RISC-V RV32IM Core on FPGA (263.7 CoreMark, 91.0 DMIPS@100MHz)

cpu fpga runtime architecture riscv verilog uart systemverilog hdl microarchitecture branch-prediction coremark rv32i cpu-architecture dhrystone rv32im uart-programming

This project shows the possibility to view and change variables via a serial interface (UART) during the program runtime.

Add a description, image, and links to the uart-programming topic page so that developers can more easily learn about it.

To associate your repository with the uart-programming topic, visit your repo's landing page and select "manage topics."